The present invention relates to semiconductor device fabrication and, more specifically, to fabrication methods for a junction field-effect transistor, junction field-effect transistors, and design structures for a junction field-effect transistor.
A junction field-effect transistor (JFET) is a type of semiconductor device having a channel of a semiconductor material between a source and a drain located at the opposite ends of the channel. Junction field-effect transistors may be used, for example, in bipolar complementary metal-oxide-semiconductor (BiCMOS) integrated circuits.
The semiconductor material of the channel is doped to contain positive charge carriers (p-type) or of negative carriers (n-type). The current of majority charge carriers flowing through the channel is controlled by a bias voltage applied to a gate. In contrast to a metal-oxide-semiconductor field-effect transistor (MOSFET), the gate of a junction field-effect transistor is not insulated from the channel. Instead, the gate is doped opposite to that of the channel, so that there is a p-n junction at the interface between the gate and channel.
The output from the junction field-effect transistor is the current of majority carriers flowing in the channel between the source and drain. The current depends on the electric field between source and drain. The channel conducts in the absence of a bias voltage applied to the gate. The p-n junction between the gate and the semiconductor may be reverse biased. The bias voltage, which is applied between the source and the gate, pinches the channel by increasing the width of the depletion region. The current flow is modulated by the depletion of charge carriers from the channel. The pinching of the channel may impede current flow through the channel or, if the reverse bias is sufficiently high, may completely pinch off the channel. If the channel is pinched off, the junction field-effect transistor is forced into a cutoff mode. Therefore, the junction field-effect transistor is a depletion mode device characterized by a high input impedance.
Improved fabrication methods, device structures, and design structures are needed for junction field-effect transistors that extend the capabilities of the technology.